Frequency analysis of an all-spin logic circuit simulation

Authors

  • Kevin Paolo G. Icaro Department of Physics, Mapúa University
  • Carlos Dwain L. Sorallo Department of Physics, Mapúa University
  • Carlos F. Baldo III Department of Physics, Mapúa University

Abstract

The study focuses on analyzing the frequency-dependent performance of an all-spin logic (ASL) circuit. The ASL circuit model is simulated using (i) stochastic Landau-Lifshitz-Gilbert (sLLG) equation to capture the magnetization dynamics, (ii) spin drift-diffusion equation to describe the spin transport, and (iii) spin modified circuit analysis to formalize a schematic diagram for the ASL circuit. From the generated output spin current, the ASL circuit works well with its logic switch capability demonstrated as a logic buffer and inverter. A frequency sweep analysis is employed to obtain the operating frequency performance parameter where the decay range on its output clock rate is determined. From here, a linear fit is used to obtain the critical frequency, which is found to be fc =0.31770±0.00006 GHz. This serves as an implication of a figure of merit for the ASL circuit.

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Published

2022-09-11

How to Cite

[1]
“Frequency analysis of an all-spin logic circuit simulation”, Proc. SPP, vol. 40, no. 1, pp. SPP–2022, Sep. 2022, Accessed: Mar. 24, 2026. [Online]. Available: https://proceedings.spp-online.org/article/view/SPP-2022-1G-05