Hysteresis and p-n junction capacitance investigations of DE MOSFET

Abstract

In this study, the hysteretic behavior and the p-n junction capacitance of an IRF530 metal-oxide-semiconductor field-effect transistor (MOSFET) were investigated utilizing an actual basic circuit setup. Hysteresis was more evident at high voltage frequencies. Moreover, it was monitored to approach higher threshold input frequency for negative offset voltage than without the offset. The behavior is accounted to the non-instantaneous response of the charge carriers within the depletion region of the p-n junction between transistor’s drain and source. It was also observed that junction capacitance decreases for higher offset voltage values and as the voltage frequency increases. The resulting trend agreed with the theoretical relations.