FPGA­-based 16 channel logic analyzer

Abstract

A logic analyzer was designed, implemented and tested. The designed instrument was implemented using a Spartan 3 Board containing an XC3S200 Field Programmable Gate Array (FPGA) Integrated Circuit. The board used a Cathode­Ray­Tube (CRT) display monitor. The FPGA was programmed using Very High Speed Integrated Circuits Hardware Description Language (VHDL). The designed analyzer with a sampling frequency of 100 MHz in timing mode and a user defined sampling frequency in state mode successfully displayed the logic levels of the signals at frequencies of 50 MHz, 25, MHz, 12.5 MHz, 6.25 MHz, 10 MHz, 5 MHz and 2.5 MHz.